48 step sequencer problem

[heron8888 0]

I recently downloaded the simple 48 step sequencer , from the download area, but when testing it found a problem. it is fine untill it gets to he 16th step then it multiplies 16384 by 2 and faults the processor (5/03) it gives a result of 32767 and even if i reset the maths overflow trap this number turns on all the steps . I could alter the program to miss this step but am I doing anything wrong?

[BobLfoot 302]

This program was written for the 5/05 when originally conceived and I learned thru trial and error that it has some limitations on lesser platforms. IF you check the discussion for the download Panic Mode has an equally clever way of doing multi step sequencers whhc should not have this problem on the 5/03.

[Ken Moore 23]

I wrote a washing machine program some time ago that used a counter as a step sequencer, you can see the sequence in ladder 6. http://forums.mrplc.com/index.php?autocom=downloads&showfile=359 It only has 8 steps, but by using a counter your limit is 32767 steps. If you down load it and parse over the logic, perhaps it will give an idea or two.

[heron8888 0]

ok thanks ive always worked with siemens before and use the same program as yours but with bsl instead of the multiply

[panic mode 246]

normally DCD instruction is used for this (well that was intention) but it's limited to fixed size of 4 to 1of16 decode (good for up to 16 steps). using FLL and two DCDs you can get up to 32 but this is getting kinda messy... this is why I came up with simple FLL and coil (and indirect address). Example I posted in 48-step tread used two FLLs because one FLL can only wipe out up to 128 words, not the whole file and challenge was to make 4096 step sequencer. I like working on AB controllers but sometimes I do get frustrated with instruction set. Personally I would like instruction set that can manipulate larger chunks of data (larger than file size would be nice too, I don't like 40, 128 or 256 element limit). 32-bit integer files wouldn't hurt. Then there are processors that support one instruction but not it's inverse function (DCD and ENC for example etc.). Also COP instruction is rather defective, it should be able to copy any block of data without data corruption and without use of buffers (like BMOV in Mitsubishi). Some of this is resolved in RSL5K but at a cost of other things. But since nobody is perfect and using RSL is still easier and nicer than competition, I better stop now...

[TimWilborne 108]

Panic, have you had a chance to play with the Controllogix, Compactlogix, or Flexlogix? Think it is more o what you are looking for

[panic mode 246]

I know very well that Control and Compact Logix are out there, I'm using them for years now. This doesn't help lowering my expectations when it comes to things on different platforms. I am aware of indexing across files, but with just one index...naaaay....