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ecca

6 digit counters in FX

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I set up a data register as a counter because the normal counters have insufficient digits then sometimes the counter counts backwards. I add to the data register to achieve the count and reset it by subracting itself from itself. Can anyone tell me why it goes backwards , or better still how to achieve a 6 digit totalising counter. PLC= FX0N, data register =D0 Cheers, Ecca Edited by ecca

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Post your code. FX0N doesn't have 32 bit counters so cascading counters or data registers are the way. What exactly is going backwards? D0? C0? D0 may be appearing to 'go backwards' or at least be less than it was if it is lower word of a double word. Counters count down if M80?? (some special bit) is on. What you need is simple to achieve. Hint : are you using double word instructions (DADD...)? Count trigger -||---------------------[PLS M1] M1 -||---------------------[DADD K1 D0 D0] ..........(or just DINC D0) Reset signal -||---------------------[DMOV k0 D0] Edited by Veganic

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I am using double word instructions so I'll take a look at this tomorrow....... Cheers Ecca PS Post what code ? Edited by ecca

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Sorry. Add your GX-developer program as an attachement (zip the whole project directory) Or post a jpg of the screen print. Edited by Veganic

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sorry for being curios but what is meant by 6-digit in this case? (it could be bits, decimal or hex digits, well it could be octal too)

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Are you using D1 for any other purpose. If your counter is D0 and your you are using 32 bit instructions. D0 and D1 are used to store counter value. Post commands that you use for better suggestions.

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Wow you are using MEDOC.What i see from your code: D128 is your double register "counter" register.Using D129 for C16 set value is wrong. I think you left C16 but not using it. "DIV D128 D128 D128" is wrong. DIV is division, not subtraction.Dividing a number to itself doesn't produce 0. If D128 is zero it produces error. If it is not zero, D128 becomes 1 and D129 becomes 0. Correct command is "DMOV KO D128"

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Well that is funny, I am laughing - not at you ecca but at the literal translation of post your code (or a screen shot) and you posted a photo of your monitor - but that works, we can see the code. :) And just a point of correct coding. You have put the pulse PLS instruction after the bit you want pulsed where it is good practice to put the pls before the bit you want pulsed. _ its a scan thing and although you may get away with it this time - in future programs the bit that pulses will only be on for one scan and on the next scan down it will miss the PLS and nothing will happen - and you will be left scratching your head as to why the pls is nor working

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hmmmm.... there could be some more problems. i wonder if this program really does what programmer intended (and if it does, it's rather unusual way to accomplish it). for example i see instruction DINC D128. this increment is 32-bit and affects both D128 and D129. on the other hand C16 is using D129 as preset (which is 16-bit). DIV D128 D128 D128 is not clearing D128, it sets value 1 in D128 and value 0 in D129. also division and multiplication have result that is twice the number of bits of operands. DIV is 16-bit instruction but result is 32-bit so again it overwrites D128 and D129. then i look back at that C16 counter with preset zero.

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Ahhhhh... that explains a lot. When D128 was reset.... so was D129 to my consternation. Many thank for replies all, I'm new to these data registers and not very good. I was at work this morning, took the picture with my phone, got on this forum using it and attached the picture. Ain't technology marvellous. Thanks again all, I'll probably be back again tomorrow, Cheers Ecca PS Medoc is much better than GX Developer, it's miles too slow when you're monitoring things.

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you are welcome.the second register (D129) in this case (DIV) is remainder of the division. i recommend keeping instruction manual for reference. i was bitten before so i don't like surprises, this is why i am reluctant to use any instruction until I test it in and out (regardless how obvious it may look).

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