Sign in to follow this  
Followers 0
KidPLC

UDT Boolean Array

9 posts in this topic

Hi Guys, I was wondering if anyone had any suggestions on how to check a UDT of two boolean arrays to see if they are equal to zero. The UDT Structure is as follows. Name: UDT_Message First Member: Name - Faults of Type - Bool[160] Second Member: Name - Status of Type - Bool[160] I have created a tag called "Message" of Type UDT_Message. I would like to interogate the Message.Fault Array to see if all bools within the array are zero. I would also like to do the same with Message.Status. Individual faults will be assigned to respective Message.Fault[x] bits and I have some simple code to check through the Array using indirect addressing and a pointer. When an active message is found the pointer value is loaded to a "message_display" tag then searching stops for a few seconds. The message_display tag is polled by a simple message display box in a PV. The same is done for status bits. I am trying to find a clever way of determining that all Message.Fault[x] bits are at value zero but I can't find an instruction to interogate them elegantly. Currently I am moving value zero into the "message_display" tag when the pointer limit is reached and I reset the pointer to zero however if I have a single active message it will be turned off momentarily until it is picked up by the active fault scanning code. I have message 0 of the message display box the same colour as the screen background so a value of zero means no active messages, the message display disappears and the screen looks less cluttered. I would really only like to load a zero if no messages fault or status are active rather than at the end of the search when I begin to rescan for active alarms. Would love to hear any suggestions. Cheers Edited by KidPLC

Share this post


Link to post
Share on other sites
Instead of using a boolean array use Dints and import the UDT as a bit overlay. Then you can determine if all bits are clear with an EQU by testing the DINT to see if it is zero, but still access individual bits as bools by name.

Share this post


Link to post
Share on other sites
Hi Alaric, Could you explain your solution in a bit more detail please, what do you mean by "import the UDT as a bit overlay"

Share this post


Link to post
Share on other sites
On second thought, overlays are a pretty advanced topic. Take a look at technote 45361 in the AB KB. This might better meet your needs. If it doesn't then get back here and I'll dive into overlays. Overlay quickie summary: Consider your RSLogix500 timers. You had a /EN bit, a /TT bit, and a /DN bit. T4:0.0/13 was the same thing as T4:0/DN. Either way is a valid address. Overlays are a tool that allows you to do the same thing, ie, name the bits in a word but it can't be entered directly in RSlogix5000. It has to be imported. If you have a tech connect contract and you can access the thread http://forums.rockwellautomation.com/rockw...p;thread.id=109 then you can see an XML file that I posted for a bit overlay. If you want to see one in action, save that as a text file with an L5X extension and import it into the UDT section of a test program.

Share this post


Link to post
Share on other sites
Hi Alaric, Your earlier post re array of DINT's has prompted me to go another way (please see attached file). If you have any comments re my programming approach to this problem please feel free to comment I am wide open to new ideas and suggestions. I am VERY interested in Overlays. We do have a support agreement and I will have a look at the tech note references you have give me. If I have further questions I might enter it as a separate post. Thanks for your help it is really appreciated. Cheers RSLogix_5000_Report_s_.pdf

Share this post


Link to post
Share on other sites
If I remember correctly the FBC is a multi-scan instruction. Each occurrence of a finding turns on the FD bit I think. The value of location when the FD is true could be decoded just like your EQU's. But your approach is solid non the less. Just remember that FBC may take several scans to finish.

Share this post


Link to post
Share on other sites
Bob, The FBC can be configured to find the first mismatch in a bit array, or all mismatches in a bit array. The FSC, on the other hand, can be set up to compare one word per scan, or perform the whole operation in a single scan. I think the FSC may be the one you were referring to. Paul

Share this post


Link to post
Share on other sites
I Bow Corrected.

Share this post


Link to post
Share on other sites
Thanks for the feedback Bob and Okie much appreciated. Cheers

Share this post


Link to post
Share on other sites

Create an account or sign in to comment

You need to be a member in order to leave a comment

Create an account

Sign up for a new account in our community. It's easy!


Register a new account

Sign in

Already have an account? Sign in here.


Sign In Now
Sign in to follow this  
Followers 0