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Tom749

FLL instruction

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I have one question of the FLL instruction. Such as attached picture the FLL instruction is to fill file from source to destination as much as length. So when you see the attached picture of PLC program the source data is written to the output card. For instance the (-1) data is written the output card 3.14/3.15 as the length. The (-1) data is written to the output card 3.17/3.18/3.19/3.20/3.21/3.22. The (255) data is written to output card 3.23. But at here I have one question. As you know the 255d is changed to 11111111b. what is the (-1) changed to as binary data? Thanks for your help. Edited by Tom749

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In a SLC the basic integer is 16 bits. Minus 1 (-1) is one less than zero. Subtract 1 (in binary) from zero (with a borrow from an assumed 17th bit). You get 16 ones. So the entire word is ones. In hex it would be FFFF.

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Greetings Tom, Bernie has answered your question but I do have one suggestion. You have nested your rung branches. This is inefficient and you can only nest branches four levels. I recommend you extend your branches, don't nest them. Take a look at this forum thread http://forums.mrplc....18&st=0&p=94713 and scroll down to see more posts on not nesting branches and instruction on how to extend them instead of nesting. Edited by Alaric

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Negative numbers in AB PLC's are always represented in 2's complement form. Here's how it works. Suppose we're dealing with 8 bit words. The first 7 bits represent what you expect, positive numbers (1, 2, 4, 8, 16, 32, 64). But the last one, the "sign bit" is a bit of a twist. It represents the negative version. So the 8th bit in this case is -128. So -1 would be -128 + 127, so it would be 8 ones. Normally, AB PLC's use either 16 bit INT's (so the number range is from -32768 to +32767), or DINT's (32 bit numbers...a lot of digits there, *Logix processors only). The big advantage of two's complement arithmetic from a circuitry point of view is that everything works perfectly without paying attention to the sign bit...unsigned arithmetic and signed arithmetic are identical from a hardware point of view if a number is represented in two's complement form. To "upsize" to a larger word with two's complement, simply take the MSB and repeat it for all the extra bits. This is called sign extension. So with positive numbers, you simply put zeroes into the extra MSB's. With a negative number, they become all 1's. You can do the conversion back and forth in binary from a positive to negative number (or vice versa) by starting at the LSB and copying all the zeroes you find until you reach the first 1. Then copy that 1 and flip all the remaining bits.

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