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[TerryRWood 0]

Here's another one for you Ken.....lol Plan B I have 8 inputs (low level Prox) directly turning on 8 outputs (fill supply) But I want to allow only 2 at a time to run (system can't supply all 8 at once) I need to stack the requests in the order they came in, then output them in the same order allowing the next in line to take the place of the one that just cut off... My logic looks like a road map of Kansas Terry

[OkiePC 14]

You need a FFL/FFU pair with the same control address. When a new valid request comes in, it gets FFL'd onto the stack, and when the system is ready to move to the next request, that value if FFU'd to the register that is mapped to the outputs. There are several scenarios which have to be dealt with. If three inputs come on in the same scan, which two do you add to the request list? Do you add the third one on the next request? What about false signals? Is there a dwell time for each input to validate it or is this unecessary? What determines when to advance the outputs to the next request? Is it time based? How many items does the stack require? What happens when the stack is full, and a new request is received? The FIFO instructions can look a little odd when you program them. I always refer to a working example to make sure I have the addressing correct. This example stacks up to 60 words of data from N17:0 to N17:59 and uses N17:60 for the unload destination. This example is for a SLC5/04. Of course, the addresses may have to change for your controller. The bits B3:0/1, 2, and 3 must be defined by you elsewhere in the logic, but the FFU and FFL logic example should work to illustrate how the instructions function. Hope this gets ya started! Paul C. FFL_FFU.RSS

[TerryRWood 0]

I meant to attach the original logic that I started with.... See below I know this does not allow for 2 outputs energized.. only 1 and that the sequence will follow scan order not request order. Terry OKIEPC..... Thanks for the reply RE: There are several scenarios which have to be dealt with. If three inputs come on in the same scan, which two do you add to the request list?.....PREFER THE FIRST TWO Do you add the third one on the next request?......THAT WOULD BE FINE What about false signals? .....N/A Is there a dwell time for each input to validate it or is this unecessary? ....N/A What determines when to advance the outputs to the next request?... WHEN ANY ONE FINISHES Is it time based?...... NO How many items does the stack require?....ONE What happens when the stack is full, and a new request is received?....????? What I have is an 8 bin feeder system with a high and low prox on each bin, I fill via 8 vacuum sols. We lack enough utilities to let all 8 run at once, I latch on the vac when a bin is low and turn off at the high prox. Vac is latched out until low prox is met again. My desire is to allow only 2 sols to run at the same time. Terry 1FEED_7INHIBITS.RSS Edited 11 Jan 2006 by TerryRWood

[TerryRWood 0]

My 2nd attempt The one with 2 feed 6 inhibits.... Still didn't like it Terry 2FEED_6INHIBITS.RSS

[panic mode 246]

code in LAD4 will turn up to two outputs depending on inputs comming from proxy sensors. it will always select two lowest proxy sensors and turn appropriate outputs. sorry for short comments... it's just quick and dirty spagety code. registers without comments are used as temporary storage. for example if inputs 2,4 and 5 are on, only outputs 2 and 4 will be active. if either input 2 or 4 goes off, output 5 will turn on (become second active output), etc. 2feed.RSS

[brucechase 1]

Terry, there is one thing to consider when doing this style of program and that is who will be responsible for troubleshooting and/or program modification. In the plant I work at, the techs can and do get into the program to troubleshoot and sometimes modify (I cringe every morning that they do that). Most will be able to understand your way of programming but here there are few that would feel comfortable with the fifo and even less with panic modes method. I'm not saying that these are bad, quite the contrary. I think that the bitwise handling is very good and I've even used the fifo a few times. I like it and wouldn't have thought of that way of handling I/O (that's why I come here is to learn some of this higher level stuff). If you don't have good people that can understand this and you don't want to get called in at 2:00am to tell them why the solenoid won't come on, then sometimes the less elegant way of programming might be better.

[panic mode 246]

in that case, here is very simple logic (lad5) that does the same, uses no other memory (just inputs and outputs) and it's only 8 rungs. notice how NO contacts in matrix of each rung are arranged diagonally and last branch of each rung is all NC. also note that rung get progressively bigger.... and sice we want up to 2 outputs active at the same time, first two rungs don't have any filters. if one wanted up to 5 outputs active at the same time, first five rungs would be simple and only following rungs would have them. 2FEED_2.RSS

[OkiePC 14]

Okay, here's one that's a little better than my last attempt. It does exactly what you require as far as I can tell. It doesn't use a FIFO, but does have a simple sorting loop in it. The rest of the program (33 rungs total) is very straightforward. I used B9 addresses for the Bin Full proximity switches since I didn't find them in your original code. I tested this on a PLC5, then copied it into RSLogix500. You could shorten the program in your SLC by using an OTE with an indexed bit level address. This is illegal in a PLC5 and probably not worth the confusion it's bound to cause, so I didn't bother. Fill_bins_in_order.RSS Edited 12 Jan 2006 by OkiePC

[OkiePC 14]

I should not have used the word "exactly". I thought of a problem with the timers. I used RTO timers that will freeeze the acc when the rung goes false. Then an enpty bin timer could overtake one that is filling and interrupt it. Here's one that uses TON timers that run until the bin is full to prevent this. Use whichever method best fits the application. You could also put XIO T4:n/DN in series with each TON and set the PREsets to limit how long the fill attempt can continue before switching to the next. FILL_BINS_IN_ORDER_r001.RSS

[Doug_P 0]

One Possibility: Store the incoming requests in a FIFO. Allocate two 'B' words to take the FIFO output. OR the binary words together and use the output address as the destination. Something like this - 1. Request '1' comes in and a FFL is done. Now check the B words and unload the FIFO to the one which is empty (if any). 2. Request '2' comes in and a FFL is done. Check the B words and unload the FIFO to the one which is empty (if any). 3. Request '3' comes in and a FFL is done. Check the B words and unload the FIFO to the one which is empty (if any). Since both B words are non-zero, no FFU takes place. 4. Request '4' comes in and a FFL is done. Check the B words and unload the FIFO to the one which is empty (if any). Since both B words are non-zero, the FFU is inhibited. Now you have two outputs driving and two waiting in the FIFO. When one of the bins fills, clear its B word to zero allowing the FIFO to unload the next value to the empty word. I know this isn't completely worked out but maybe it'll jog an idea loose.

[panic mode 246]

Terry, you got few answers. did any of this work out for you?