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Off-delay Timing For Fx

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Hi all, I am presently using Mitsubishi's FX series PLCs, programming with MEDOC. I am looking for an easier way to create a TRUE off-delay. To accomplish this now I have to use a relay equivalent, a latch, and an on-delay timer. This gets to be a bit much when you you need more than a couple of off-delays. Any thoughts? Thanks,

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As you will already know, Mitsubishi FX's do not have a true TOF but I am not sure what you mean by 'its a bit much'. A TOF can be done in two lines of ladder --| X0 |-+-|/T0|---------------------(M0)             | --| M0 |-+-|/X1|--------------------(T0 K50) Where X0 is the trigger, M0 is the off delay coil set by T0. (I am sure you already did it this way, this is for the benefit of others) You can cut and paste and rename but its no big deal writing the two lines for each TOF.

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Thanks for your reply. That does the trick, just what I was looking for. I previously required 5 lines of ladder, that's why I said it was a bit much. Thanks Again!

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Actually, now I look at my ladder, I realise I made a mistake. The bottom N/C X1 should be N/C X0 Ah, that's programming for you. Glad I could be of some help.

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Unfortunately, this is a common thread that runs through all Japanese PLCs. Mitsubishi, Omron, Idec, Aromat, etc. all offer only one timer - the on delay timer. All other forms of timing have to be built with logic using the on-delay timer.

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Hi, also you can used TMR instruction. 5.7.6 STMR (FNC 65) Operation: The designated timer Swill operate for the duration n with the operational effect being flagged by devices D+0to D+3. Device D+0is an off-delay timer, D+1is a one shot timer. When D+3is used in the configuration below, D+1and D+2act in a alternate flashing sequence. Mnemonic Function Operands Program steps S n D STMR FNC 65 (Special timer) Provides dedicated off-delay, one shot and flash timers T Note: Timers 0 to 199 (100msec devices) K, H ) Note: n= 1 to 32,767 Y, M, S Note:uses 4 consecutive devices D+0to D+3 STMR: 7 steps FX1S FX1N FX2N FX2NC PULSE-P 16 BIT OPERATION 32 BIT OPERATION X0 K 100 M 0 [ S ] [ D ] T 10 STMR [ n ] X0 M0 M1 M2 M3 X0 K 100 M 0 T 10 STMR M3 X0 M2 M1(M3)

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