DIFD execution cycle

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Hi All, I'm trying to troubleshoot a CS1H CPU using a DIFD one shot bit execution command. It has a bit output from a FB, using DIFD (W0.00), declared as a public symbol - P_Reset_Flow, used for global flow accumulation reset. In another function block (ST), it uses the bit as external symbol: IF P_Reset_Flow = TRUE THEN Flow := +0.00 END IF Problem is: * Reported on site PLC does not see the bit coming on, only for couple of FB instances (closer to the end of the cyclic runs), other FB instances do work * The same function block, is working as it should, flow accumulation counts up, but will not reset. Other function block instances do reset the flow. * I've successfully done simulation of the code, it works with no problem * Loaded same program onto a CJ2H CPU, it works with no problem I'm a bit out of clue why this could be an issue. I would expect P_Reset_Flow bit to remain ON for entire duration of program cycle, not sure why it is not picked up in couple of function block calls. Searching the PLC program, cannot find any JMP/JME or SBS/SBN calls, this rules out execution skipping of the FB.

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Are all the FB's always enabled? Do they have any other conditions pertaining to the reset? Assuming they all in a cyclic task?

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Thanks for pointing the first point out. This led to finding the instrument has loop error during the time of reset (which disabled the FB Enable bit). This explains the mismatch in the debug run in simulation and bench test PLC.