Siemens STL program

[Tom749 0]

I have questions of Siemens PLC logics. The questions are as followings: (1) What is the meaning of the STL sequences(Logics) in the Q1 attachment? Is there any datasheet for the STL logic? (2) What is the main differences beteen Positive RLO Edge Detection Address and Positive Edge Detection such as the Q2 attachment? Thanks for you advice in advance. Edited 1 Apr 2011 by Tom749

[EirikV 1]

Q1: This is indirect addressing. You load a pointer (denoted with the P# syntax) to a date and time variable (#DT1) into address register 1 (AR1), then year, month, day, hour, minute and second is extracted from it by taking the address AR1 is pointing to and picking out bytes with an offset given by the P#n.0 value (32-bit pointer). You can place the caret in STL view on an instruction and press F1 to get context sensitive help. LAR1 P##DT1 //Load pointer to #DT1 into AR1 L B [AR1,P#0.0] //Load the contents of AR1 + 0 bytes into ACCU1 in the size of bytes T #Year //Transfer to Year variable L B [AR1,P#1.0] //Load the contents of AR1 + 1 byte into ACCU1 in the size of bytes T #Month //Transfer to month variable Q2: Positive edge detection will only yield true when the signal you want to do edge detection on goes high. Positive RLO detection will look at the RLO bit and this does not necessarily go from 0 to 1 if an input signal does so, for instance: A I 0.0 //Here RLO goes from 0 to 1 if I0.0 goes from 0 to 1 AN I 0.0 //Here RLO goes from 0 to 1 if I0.0 goes from 1 to 0 Edited 1 Apr 2011 by EirikV