About This File
This manual describes installation and operation of the CP-series Programmable Controllers (PLCs) and includes the sections described below. The CP Series provides advanced package-type PLCs based on OMRON’s advanced control technologies and vast experience in automated control.
Precautions provides general precautions for using the Programmable Controller and related devices.
Section 1 introduces the features of the CP1L and describes its configuration. It also describes the Units that are available and connection methods for Programming Devices and other peripheral devices.
Section 2 describes the names and functions of CP1L parts and provides CP1L specifications.
Section 3 describes how to install and wire the CP1L.
Section 4 describes the structure and functions of the I/O Memory Areas and Parameter Areas.
Section 5 describes the CP1L’s interrupt and high-speed counter functions.
Section 6 describes all of the advanced functions of the CP1L that can be used to achieve specific application needs.
Section 7 describes how to use CP-series Expansion Units and Expansion I/O Units.
Section 8 gives an outline of the LCD Option Board, explains how to install and remove the LCD Option Board, and describes the functions including how to monitor and make settings for the PLC. It also lists the errors during operation and provides probable causes and countermeasures for troubleshooting.
Section 9 gives an outline of the Ethernet Option Board, explains how to install and remove the Ethernet Option Board, and how to monitor and make settings required for operation. It also lists the errors during operation and provides countermeasures for troubleshooting.
Section 10 describes the processes used to transfer the program to the CPU Unit and the functions that can be used to test and debug the program.
Section 11 provides information on hardware and software errors that occur during CP1L operation.
Section 12 provides inspection and maintenance information.
Appendices provide product lists, dimensions, tables of Auxiliary Area allocations, and a memory map.