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teal854t
The program below uses indirect addressing at MOV instruction using SLC 5/03. I have Micrologix 1000 or SLC 5/01 and indirect addressing is not available. How can I rewrite the program?

[attachmentid=1923]







Ken Moore
Nothing attached.
But generally speaking, without seeing your application, you can replace the indirect addressing with the equivilent number of rungs.
If you had a routine that looped through 32 times, you would need 32 rungs of ladder to replace it.







QUOTE(teal854t @ Feb 7 2006, 11:35 AM) [snapback]28128[/snapback]
The program below uses indirect addressing at MOV instruction using SLC 5/03. I have Micrologix 1000 or SLC 5/01 and indirect addressing is not available. How can I rewrite the program?
[attachmentid=1918]

teal854t
QUOTE(Ken Moore @ Feb 7 2006, 11:39 AM) [snapback]28129[/snapback]
Nothing attached.
But generally speaking, without seeing your application, you can replace the indirect addressing with the equivilent number of rungs.
If you had a routine that looped through 32 times, you would need 32 rungs of ladder to replace it.

Sorry I was having problem attaching it.





QUOTE(teal854t @ Feb 7 2006, 11:35 AM) [snapback]28128[/snapback]
The program below uses indirect addressing at MOV instruction using SLC 5/03. I have Micrologix 1000 or SLC 5/01 and indirect addressing is not available. How can I rewrite the program?
[attachmentid=1918]

b_carlton
It looks like it's storing to N7:0 through N7:59. That's a lot of rungs. You may wish to rethink this method of storing this information on these CPUs

Ken Moore
I believe it's N7:0 to N7:99, that will require 100 rungs!


QUOTE(b_carlton @ Feb 7 2006, 12:26 PM) [snapback]28132[/snapback]
It looks like it's storing to N7:0 through N7:59. That's a lot of rungs. You may wish to rethink this method of storing this information on these CPUs

Spedley
This should do the trick:

SOR XIC I:0.0/0 BST TON T4:0 1.0 3600 0 NXB CTU C5:0 99 0 NXB MOV C5:0.ACC S:24 NXB MOV T4:0.ACC #N7:0 BND EOR

I'm almost certain the MicroLogix 1000 supports indexed addressing so the above is the same thing.
Ken Moore
Good solution! The ML1000 does support indexed addressing, but I don't believe the 5/01 does.

QUOTE(Spedley @ Feb 7 2006, 01:38 PM) [snapback]28138[/snapback]
This should do the trick:

SOR XIC I:0.0/0 BST TON T4:0 1.0 3600 0 NXB CTU C5:0 99 0 NXB MOV C5:0.ACC S:24 NXB MOV T4:0.ACC #N7:0 BND EOR

I'm almost certain the MicroLogix 1000 supports indexed addressing so the above is the same thing.
teal854t
QUOTE(Spedley @ Feb 7 2006, 01:38 PM) [snapback]28138[/snapback]
This should do the trick:

SOR XIC I:0.0/0 BST TON T4:0 1.0 3600 0 NXB CTU C5:0 99 0 NXB MOV C5:0.ACC S:24 NXB MOV T4:0.ACC #N7:0 BND EOR

I'm almost certain the MicroLogix 1000 supports indexed addressing so the above is the same thing.

Excuse my ignorance, I don't inderstand that kind of mnemonic. Is input I:0/0 series with T4:0 and T4:0//CTU5//MOV C5:0.ACC, S:24//MOV T4:0.ACC, N7:0

QUOTE(Spedley @ Feb 7 2006, 01:38 PM) [snapback]28138[/snapback]
This should do the trick:

SOR XIC I:0.0/0 BST TON T4:0 1.0 3600 0 NXB CTU C5:0 99 0 NXB MOV C5:0.ACC S:24 NXB MOV T4:0.ACC #N7:0 BND EOR

I'm almost certain the MicroLogix 1000 supports indexed addressing so the above is the same thing.


Excuse my ignorance. I don't under stand the mnemonic.
Does it mean I:1.0 and T4:0//CTY5:0 1.0 3600//MOV C5:0.ACC S:24//MOV T4:0.ACC #N7:0 ?
SOR? BST? NXB? BND? EOR?

Ken Moore
SOR-start of rung
BST-branch start
NXB-next branch
BND-branch end
EOR-end of rung



The easy way.
If you start RS500, then insert a rung, double click on the rung number, it will open a box in which you can enter ascii text that will then be converted to ladder. So...in the case, insert a rung, double click the rung number, copy and paste the posted code, then hit enter, and you will get the ladder.

Counldn't get the photo's to display in the proper order, tried several times. Anyway, the one at the bottom should be in the middle, and the ladder last.
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