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FDB Compile error help

Started by a_rishi, 12 Mar 2015

1 post in this topic

Posted 12 Mar 2015

Hi Everybody I'm new to Siemens PLC and is working on a Poject for m course. I'm trying to build a DFB Motor for Global use. I have the code in SCL but there are certain errors such as the Bit Second (1 Sec), the Rising edge of the Bit Second, etc. Please clarify how can we insert Bit Second in SCL and its Rising edge. Kindly check the FDB structure Text and help me to clear the faults. Attached file or Please Download it from https://www.dropbox.com/s/aeuuz3w3bk...Motor.zip?dl=0 Kind Regards DFB Block Motor.zip

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