gromit

SLC5/05 in unmatched chassis

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I have a spare SLC5/05 chassis with I/O.

I want to load a different SLC5/05 program into this processor, but the I/O configuration doesn't match the actual modules.

So, how can I run the program without it faulting, so that I could test some of the subroutines?

Thanks.

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Just go into the I/O configuration and click on advanced config for the module that is not there (or double click on it).  You will see a check box "ignore configuration error."  Check that box and you should be able to run your program without faults.

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Thanks for your reply. . .

However, I don't see the "ignore configuration error" checkbox.

See the attached pic for reference.

slc505_io_config.jpg

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Thanks Mickey, I will try this today.

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Ack!  I guess I have been using micrologix controllers too much lately!  I did a quick check before my post but didn't realize that project was a micro.  Glad Mickey stepped up to cover my tracks!  (or any other appropriate word that might go there)

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The initial fault was cleared by setting s:11&12, s:27&18, and s:25&26 to all 0s.

I then changed the rack size from 13 slots to 10 slots, and then replace many input and output assignments to integer files; which cleared the program errors.

Unfortunately, I am still getting the following error..."A minor error bit is set at the end of the scan.  refer to S:5 minor error bits." as depicted in the attached pic.

Do you have any other ideas on how to clear the fault?

bt_lab-plc_fault1.jpg

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That matches my recollection;  you can't change the Chassis Size or ignore the mismatch on a modular SLC-500 program.

You're already doing the usual unlatch of S:5/0 to ignore math overflow errors, but your Major Fault is being caused by the condition noted in s:5/4, the M0/M1 Referenced in a Disabled Slot.

Try doing an unlatch for S:5/4 as well, to see if that allows the controller to ignore the minor fault, thus preventing the major fault.

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Ken, thanks for your reply...I was able to prevent the major error by doing the following:

removed 2nd 10-slot chassis & disabled s11-12 & s27-28 to ignore modules in rack to
prevent processor from faulting...also added n110:0-3 through n117:0-3 to replace I:10-14.0-3 and
O:15-17.0-3 to prevent processor fault. Also added JMP & LBL to bypass lad3 & 4...which are input and output routines.
Lastly, set S:5/8 & S:1/10 memory module bits from 1 to 0.

I will load a prior version and then add the s:5/4 unlatch to see if that works.

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I added the s:5/4 unlatch instruction at the bottom of Ladder 2 and then disabled the referenced JMP and returned the S:5/8 & S:1/10 memory module bits back to 1, then transferred from RUN to PROGRAM to RUN, which created the following fault.

"The required memory module is absent or S:1/10 or S:1/11 is not set as required by the program."

So, I put the S:5/8 & S:1/10 memory module bits back to 0, cleared the fault, then transferred to RUN with no faults.

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