Mitsm83

Value to corresponding bit instruction??

5 posts in this topic

Hello,

I am stumped on what to do to simplify some code I am working on. CS1H CPU.

I will try to explain what I am going for here.

Currently there is some code with a bunch of compares that I have to add "Variations" to. It basically says...

D100=110 ---OUT 0.00

D100=115 ---OUT 0.01

D100=118 ---OUT 0.02

There are currently a bunch of these lines with a bunch of different "variation" values turning on bits. 

I know there has to be a quick way to do this so future addition of "variations" 112, 113, 127... doesn't mean going in and adding individual lines or rewriting it all to line up. 

The instruction I mentally picture but cant find outputs a bit based on the value in D100. 

A bad example of this would be if D100=12 turn on 0.12 but if D100=23 turn on 1.06

I hope I explained this well enough. 

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I may be barking up a tree here, just in case any one reads this later... here is the solution. 

Separate out the digits by BCD command into 1 register then use 3 MOVD commands with control words of #0002 #0001 #0000 into individual words.

Now I have my digits in the 0 digit of individual BCD words..right. 

Then MLPX(Decode #0000) individual words into CIO. 

It makes a complicated "Variation" matrix that no one will understand but me....

Maintenance is going to love it haha... ah probably ought to just write it the long way.   

 

 

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How about using the copy command and transfer the DM area word to the HR area word. 
In the HR you will have access to bits. H000.00
Arrange the HR bits on the individual output condition.

Example:
D100 move to H100 (Value 110)
Each of the digits will have 4 bits, 12 bits on the run for the 3 digits.
12 bit conditions - Output 0.00

Just a thought.
Regards,
Garry

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I like  gclshortt's  solution better. :-2

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Is it a CS1H, or a CS1H-H?

If it is a CS1H-H (or any of our newer PLCs) then this would be simple solution:

setb.thumb.jpg.37cd0286a5a6647841071e7be

Divide the value in D100.  The answer is stored in D500 (in this example) with the remainder stored in D501.  Clear out all the words for the range that you want to use.  I left room for values from 0 - 159 (10 words), using D0-D9.  Then use the SETB instruction to point at the word with an indirect address (D500) and use D501 (the remainder) as the bit within the word.  As you can see, 17/16 = 1 with a remainder of 1.  Therefore the SETB instruction would set word D1, bit 1 to a 1 as shown in the table below:

Value17.jpg.28598b8908623b870e304d055e5f

If you set D100 to 37, then the answer is 2 with a remainder of 5 (D2 bit 5 set to on) and you get this:

Value37.jpg.409ebcd7b3fe443d1ebccf90693f

You could then use the XFER instruction like this:

xfer.jpg.8b44169679b59832a2befd16ecfc16d

to move the data from D0 to channel 0.  So, a total of 4 instructions.  

Unfortunately, if your CPU is just a CS1H, then none of this matters as it does not support the SETB instruction.

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