CMike

latch clear operation

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what is latch clear operation and how is it triggered? Q03UDCPU connected to AB contrologix via ethernet sends data to L or latch relays and i read that it is only reset via latch clear operation. will for example L02 turn off if the bit is not triggered in the contrologix side?

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is this just RST?

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I don't know what is on the Contrologix side, but in the Q CPU, LatchClear operation is to reset all latched areas (not just the L areas). You can define in the parameter setup which areas in the PLC should be latched ("Latch(1)") is cleared by "LatchClear", and "Latch(2)" is not cleared by "LatchClear".

However, what is coded in the Contrologix side is unknown to me, so it may be something custom.

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how can I clear without using latchclear? because I just want to unlatch one L  bit

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Just use "RST" instruction. The latched areas are regular devices. Latch simply means that they will be stored in the battery backed areas even if you cycle the power on the PLC, but they act as normal bits/words in your code. If you need to do anything in the program, simply use normal instructions like you would do on any other bit...

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