matt_C_25

S5 STL Help

15 posts in this topic

Good morning all,

I have been tasked with translating an old s5 to something more modern i have only a printed version of the program in STL and ladder but i have a section of STL which has no ladder equivalent and not sure how it should be drawn.

The STL looks like this as one segment

:A I0.5

:AN F1.6

:= F1.7

:A  I0.5

:= F1.6

So i have AND I0.5 ANDNOT F1.6 to coil F1.7

then AND I0.5 to coil F1.6

is this just drawn as two separate lines?

Sorry if this is a simple question just not programmed with siemens before

Regards

Matt

 

 

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You have supposed the two lines correctly.

 

Rodney

 

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F1.7 is an one shot coil
STep 5 doesn't have a specific instruction for one shot.

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I'm no longer familiar with S5 (it's been a very long time), but you could try this:-

:A I0.5

:AN F1.6

:`AN F2.0

:=F1.7

:A I0.5

:AN F1.6

:= F2.0     This is any available spare flag of your choosing

maybe someone can do it more elegantly?

 

Steve

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Ah right so any  STL like this is for a one shot coil?

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Yes,

the first scan activates the flag F1.7
The second  disable the flag 

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ah ok that makes sense now, 

thanks for the help i can get on with this conversion now.

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Just remember that when using two networks (rungs) to create a one-shot, you must make sure that the conditions always remain the same for both rungs. Otherwise your one-shot may give you countless hours of troubleshooting fun! Any changes you make to the conditions of one rung must be reflected in the other rung. Another caveat to remember is that the scan order is important in order for the one-shot to function correctly. Do not reverse the two rungs!

57f21e2af073b_Oneshotlogic2NWedited.png.

One way to eliminate the first gotcha is to simplify the logic to a single rung. In this way all conditions are contained in one rung (and always to the left of the red line). I'm not lazy - just "efficient". :clap: Order is important in this construction, also. The one-shot bit and its blocking bit (memory bit) must always be on top.

57f21e2736673_Oneshotlogic1NWedited.png.

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Thanks for the explanation POP seeing it like this has help me make sense of the code i have here. 

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Ok thanks for alll the replies, i have one more issue this time with Some code which looks like it may be some sort of pulse generator

here is the STL

:AN F 2.2

:L KT 005.1

:SD T 31

:A T 31

:= F 2.2

:A F 2.2

:AN F 2.1

:S F 2.0

:A F 2.2

:A F 2.1

:R F 2.0

:AN F 2.2

:A F 2.0

:S F 2.1

:AN F 2.2

:AN F 2.0

:R F 2.1

:BE

 

Regards

matt

Edited by matt_C_25

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I'm not sure what the overall operation of the code is because I don't know what the conditions are that SET some of the bits used in your example. However, the second and third lines preset a timer.

I've found that separating contiguous STL code into NW segments significantly improves my understanding and speeds the conversion process to LAD. I've edited the STL code you provided and made some editorial clarifications regarding timer types and timer timebases.

// (NW1) Use a marker bit to load and start a timer

:AN F 2.2

:L KT 005.1 // Preset timer with 5 cycles of 100ms = 500ms

:SD T 31    // Activate timer (T31)

// (NW2) Use the timer bit to activate a marker bit

:A T 31

:= F 2.2

// (NW3) Use two marker bits to SET a marker bit

:A F 2.2

:AN F 2.1

:S F 2.0

// (NW4) Use two marker bits to RESET a marker bit

:A F 2.2

:A F 2.1

:R F 2.0

// (NW5) Use two marker bits to SET a marker bit

:AN F 2.2

:A F 2.0

:S F 2.1

// (NW6) Use two marker bits RESET a marker bit

:AN F 2.2

:AN F 2.0

:R F 2.1

// (NW7) BLOCK END (return)

:BE

// Information

// Step 5 Timebases
// 0 =  0.01s = 10ms
// 1 =  0.1s  = 100ms
// 2 =  1s    = 1000ms
// 3 = 10s    = 10000ms

// Timer types
// SD > S_ODT (on-delay)
// SF > S_OFFDT (off-delay)
// SP > S_PULSE (pulse)
// SE > S_PEXT (extended pulse)
// SS > S_ODTS (retentive on-delay)

S5 STL Conversion matt_C_25.txt

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thanks for the info pop,

the only flag being used in the program elsewhere is F 2.0 so this flag will pulse from off to on every 500ms? this would make sense as F2.0 is part of a rung which switches an indication lamp on, under a fault condition the lamp should flash so this pulse generator must make the lamp flash.

thanks for your help

matt

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Ah, yes. Actually, F2.0 and F2.1 act as flip/flops (F/F). They are driven by F2.2. Which is acting as a one-shot because of its placement after T31. The period of the F/F pulse is:

T31 * 2 = 500ms * 2 = 1s

The duty cycle is 50 percent.

Replacing the SET and RESET instructions with an EQUAL instruction will streamline the logic a little, permitting the elimination of two networks and one marker bit.

// (NW1) Load and start timer

:AN M 2.2
:L KT 005.1
:SD T 31

// (NW2) Create one-shot bit

:A T 31
:= F 2.2

// (NW3) Create F/F

:A F 2.2
:AN F 2.0
:O
:AN F 2.2
:A F 2.0
:= F 2.0

// (NW7) BLOCK END (return)

:BE

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Cheers Pop,

I am just going to use the system clock for this.

Thanks for all your help

Regards

Matt

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