RS flip flop

[johneedw 0]

Dear friends,

I want to get a flashing output from  S7-200 PLC , I've design a simple ladder

to do this but the output doesn't flashing yet!..

The attached image is showing the RS f.flop i designed which doesn't flashing !.

Please advice me to make this circuit flashing !..

Waiting for kind help !...

[dekor 12]

Hello johneedw,

If you need only flashing output, I suggest you to use the simplest way.

Use dedicated memory bit SM0.5.

I have attached an example for you

.

[johneedw 0]

Dear Dekor,

Thank you very much for kind interest, of course your reply will increase my expert because its a new idea for me.

But also, i need to learn how to make RS f.flop to be flashing !..

Thank you..

[IO_Rack 181]

Please check the downloads section. There are examples of many tips and tricks.

http://forums.mrplc.com/index.php?/files/category/32-plc-sample-code/

 

[surya 0]

Hi all,

             Another method is there for automatic flashing.That Procedure is select the properties of the CPU, click on cycle/clock memory button bottom side see some memory byte is defined. like 1 or 10 anything. check that defined number and used in plc logic. example 1 is selected should be used like m1.0,m1.1 upto m1.7 this bit is automatically flashing from CPU itself.

Regards,

Suryamuni.

[pop29684 14]

On 6/20/2016 at 5:53 AM, johneedw said:

Dear Dekor,

Thank you very much for kind interest, of course your reply will increase my expert because its a new idea for me.

But also, i need to learn how to make RS f.flop to be flashing !..

Thank you..

What do you mean by ". . . I need to learn how to make RS f.flop to be flashing!"? Do you mean that you must use an RS F/F instruction? Or is it only necessary to achieve the action of a F/F? Am I correct to assume you need some sort of delay time in this F/F? Your request names the RS instruction but in your example you show usage of an SR instruction. Is this permissable?

The logic you show will not work. You are using the output, Q0.0, as the memory bit for the SR instruction. Use the instruction help available in the Siemens software for additional information. The logic shown below will work but the F/F action will happen at the program scan rate and be practically useless.

The logic below introduces a time delay of 1s for both the S and the R controls. The output, Q100.6, performs as an astable F/F with a period of 2s and 50% duty cycle. Adjusting the presets of the timers will permit both other periods and duty cycles.