hboyer90

Download mode bit in RSLogix5000 CompactLogix?

13 posts in this topic

Hey, this may be an obvious question, but here goes: I have a CompactLogix L36ERM running RL5000 controlling one of our lead die cast machines. When I make a change to the program offline and need to download I always go and shut the machine down for safety reasons before downloading. One of our techs stopped the machine but left the control power and hydraulic pump on while downloading (something we are not supposed to do) when he finished downloading he switched it back to run mode and the machine closed on it's own and started right back up. This is a safety concern to me. We have a "close enable" tag that is true when all necessary conditions are met, and gets latched on when the machine is running in full auto. Before he downloaded the machine was at idle, meaning that the only way to close the machine would be to press the two dead-man switches to start the process. But, when he downloaded it started up automatically. Now I know the reason why is when the program was last saved, the "close enable" tag had a value of 1, it was latched on, so it bypassed the dead-man switches. A quick fix would be to save the program with that tag un-latched so that it can't start up on it's own after downloading. But, in case somebody saves the program while the machine is running and with that tag latched on, I need a better solution. Is there any tag or bit that goes true when a program is downloaded or when the mode of the PLC is switched from run to download to run? I want to manipulate that tag so that when I download it un-latches the "close enable" tag. I'm sure there is a way to do it, I'm just not even really sure what to search for in the online help. Any help is greatly appreciated. Thanks Howard

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Set up a rung at the top of your main routine that on "FIRST SCAN" will unlatch the bits in question. The instruction for "FIRST SCAN" is S:FS S:FS--------------YOUR BIT --] [--------------------(U) Edited by Bering C Sparky

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Ok, thanks will try it right now! So do I just make an XIC and address is as: S:FS like this? Or is there an actual S:FS instruction? Sorry for the noob questions. Thanks Edited by hboyer90

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You have it half right, use a XIC with S:FS this will pass logic to the output (OTU) on the first scan each time power is applied to your processor. But you need to have the bit you want be unlatched (Not True) as the actual output bit. S:FS------------------Close Enable --] [-------------------------(U) This should insure that your enable bit is unlatched before your logic starts to execute at the machine level. I don't know your exact condition but this is just to give you an Idea. Make sure the instructions are put into your program in a way that is suitable to your application. EDIT: Yes S:FS is an actual instruction (Tag) that you will use with an XIC, it will execute upon the "FIRST SCAN" of the processor. Then this instruction will be ignored until the next time you cycle power, download or switch to program mode and back to run mode. BCS Edited by Bering C Sparky

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Gotcha, thanks.

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You can actually see this Bit in the processors tags, I don't have software with me right now but someone who does can give you the steps to see the bit box for this. (Also you might need to start sending Ron Beaufort a royalty fee each time you post for using his signature tag) LOL

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Hello again, I just read what you wrote again and don't want to confuse you. S:FS is used as a TAG name that you will put in yourself over the top of an XIC, you will not find it on a menu like you would the XIC, XIO, OTE, OTU, etc. Just put a XIC and for the TAG NAME you type in S:FS Sorry if my edit on post 4 was deceiving. BCS

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haha, I just saw his signature earlier on a different forum and got a good laugh out of it.

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Ok, so I understand what you mean, but it didn't seem to work for me. First off, when I said "close enable" I should have said "auto close" that's the tag name we gave it, I forgot. Also when I said that it is latched on, I don't mean with an OTL, I meant with it latching it'self on in parallel. I'll add a couple of screenshots. So, I can't have the S:FS control an OTU. So I set up the S:FS to energize a "First Scan" OTE and then I put a "FIRST SCAN" XIO in series with the "Auto Close" rung, so that if the "Auto Close" tag is still a 1 from being latched on by it'self, then on the first scan the "First Scan" tag will go true, unlatching the "Auto Close" tag and it should be off until the dead-man switches are pressed in. To me, logically, this makes sense. But when I downloaded and tested, it didn't work. The "Auto Close" tag stayed in it's downloaded state, which was a 1, and as soon as the processor went back to run mode, it closed up on it's own. Maybe I should have the S:FS latch on a bit that won't be un-latched until the dead-man switches are pressed? IDK, hopefully what I just said makes some sense. Here are 2 screenshot of the rungs (well 1 full rung, and 1 partial rung). Thanks Edited by hboyer90

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If it is your "Auto Close" bit that is latching itself on then you should have a "Auto Close" OTE on the end of the partial rung that we can't see. Correct??? I see that this is on rung 91 of your main Routine from what your screenshot shows. All you should need to do is insert a new rung at rung 000 in that same main routine which it looks like you already did. Just change the OTE you named "First Scan" to a OTU and use the Drop Down to choose your "Auto Close" tag. The rung should look like this: S:FS---------------------------Auto Close --] [--------------------------------(U) This way on first scan, the first rung of your main program will "Unlatch" your Auto Close bit. (This will unlatch the auto close bit even though it is an OTE and not a OTL.) There is not need to create a First Scan OTE. Again just change the First Scan OTE you created on rung 0 to a OTU and use the drop down to choose your "Auto Close" tag for it. This should work like a champ. EDIT: you will also want to delete the "First Scan" XIC you put on rung 91. BCS Edited by Bering C Sparky

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Yes, there is an "Auto Close" OTE at the end of the rung that we cannot see from this screenshot. I was unaware that you could use an OTU to un-latch an OTE. I will give it a shot, thanks! Howard

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Yes it will work. We have actually been a bit loose with throwing around incorrect terminology in this thread so I just want to take a moment to clean it up a bit. In your case you are not actually "Latching" your OTE on (you are not using a OTL instruction), you are "Sealing In" the OTE by using its same tag as a XIC on a branch extension that circumvents the normal rung logic and keeps your OTE "True". Also when using the OTU instruction in this case you are not exactly "Unlatching" the OTE in question. By using a OTU with the same tag name as the OTE in question, what happens is when the logic preceding the OTU is true, then the OTU instruction will go and write a "0" in the bit box for this tag, which in turn makes your "Auto Close OTE" False. On the next scan the processor will then see the "Auto Close XIC" on the branch extension as False, so your output will no longer be "Sealed In" BCS

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Gotcha, thanks for clearing that stuff up. Howard

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