Sign in to follow this  
Followers 0
Macgyver BR

Versamax allocate memory

4 posts in this topic

See manual, and not complete information. In page 28 manual versapro not clear is possible arquiteture configuration memory. Register (%R) is limted 4096??? Yes? Possible allocate 12K ladder for data retentive? What crack blocks 4K?2K? My aplication required, high data page 2000bytes (if possible retentive) to table. I use 3 table and possible expand 5,6 table signific 12000bytes + 2000bytes free for manipulation data. Is min. required 8000 bytes for data CPU001 get the work. What manual, explain arquiteture memory for combined.

Share this post


Link to post
Share on other sites
The limit for %R registers in a VersaMax CPU001 depends on the amount of memory used by the rest of the program. The limit of 4096 is only to maintain compatibility with earlier firmware releases. Thos earlier releases had a hard limit of 4096, but the current versions no longer impose that limit. That model CPU has 34 Kbytes of memory available. The maximum number of discrete points is fixed, but %R, %AI, and %AQ memory can be reallocated. The more memory you reserve for %R (data storage), the less you have available for the program.

Share this post


Link to post
Share on other sites
Ok! This that it thought, needed confirm. Which the size of blocks of memory? 1k, 2k, 4k?

Share this post


Link to post
Share on other sites
You can change memory allocation by as little as one %R register. That's 2 bytes.

Share this post


Link to post
Share on other sites

Create an account or sign in to comment

You need to be a member in order to leave a comment

Create an account

Sign up for a new account in our community. It's easy!


Register a new account

Sign in

Already have an account? Sign in here.


Sign In Now
Sign in to follow this  
Followers 0