Comparison Instruction in RSLogix500

[Guest dima]

I had three EQU instructions following three step sequencer which direct program to different routs depending on the step of the sequencer. At the first scan everything is all right. But when sequencer goes through second cycle the last EQU instructions remains always on. For example the third EQU is supposed to go true when sequencer at third step therefore position bit R6:0.POS is 3. It is go on at position three and stays on when sequencer is at the positions 1 and 2. I tried to change order of EQU instructions and found out that what ever EQU instruction is last it always stays on. I dont know really why. Although I can see that comparison data in instruction block are changing during program operation.

[Guest]

it would really help if you would post the program rungs ... maybe others will be able to understand your description of the problem ... but I'm not sure exactly what you mean ... what are you using for the "output" of each EQU rung? ... are you trying to use the same bit address more than once? ...