b_carlton

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About b_carlton

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  • Birthday 08/31/50

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  1. Logix 5000, Array filling

    I'm not clear why you are using multiple arrays. Only one is needed for the FIFO. I suggest the following modifications: In the first rung remove the MOV command. In the FFL change 'source' to just 'Distance' In the second rung remove the ONS contact. Remove the EQU and insert an XIC of 'control.DN'. In the AVE change the 'Dest' to a single tag. In parallel with the AVE command add a FFU. Use the same control tag as in the FFL. Provide a dummy tag as the destination for the oldest array member, assuming you don't need it. Analysis - the FIFO Unload will remove the oldest reading and bump the rest. 'control.DN' will turn off and will stay that way until the next reading is added in your first rung. Thus your second rung will only fire after the first 5 readings are accumulated then will fire after each new reading comes in.
  2. String clearing

    A string is a defined type composed of a length then an array of SINTs. I believe the CLR only works on atomic types (sint, int, dint etc). Copying an empty tag is my go-to method for more complex types. You may get some effect by just setting the length to zero but when I tried that I would occasionally see problems with new characters followed by the previous characters. I feel it's best to just clear the whole thing by copying an empty string as you are doing. Edit - actually I think CLR can be used successfully with timers and counters so my blanket statement is probably false. It would be good to have a CLR with respect to strings.
  3. Micrologix 1200 clearing controller memory

    Ganpat, pleas start a new thread. Don't start a new topic on a very old thread.   But note that your image doesn't show any problem. It is just a verification of the download action you requested.
  4. Simple Click For Loop

    It seems the only indirect/pointer function is in the Single Copy command.
  5. RSLogix500 Ladder Problem

    You have logically thown out the need for the parallel NEQ and EQU tests on N7:0 and N7:1. Just leave the tests for EQU N7:0 N7:2 and EQU N7:1 N7:3
  6. RSLogix500 Ladder Problem

    Since you mentioned RSLogix 500 I'll stick with N registers. Gather the bits in to two N registers (lets say N7:0 and N7:1) in the manner suggested by Joe E. In RSLogix500 this would look like XIC Bit0 N7:0/0 etc    (After N7:0/15 you would need to switch to N7:1/0  etc) Make sure to start out somewhere with a CLR of these two N registers. The movement of the bits into tthe N registers would have to happen every scan. For this you will also need two other N registers. Lets say N7:2 and N7:3   You can CLR these also if you wish but the only possible problem would be on the very first scan. It sounds like you want the timer to be on if any of these 22 are on. You want it to reset if any bit changes state. So the rung to the timer enable would look like: NEQ N7:0 0      EQU N7:0 N7:2   EQU N7:1 N7:3 ------------ Timer NEQ N7:1 0 (Note - two NEQs are in parallel) and another rung to store the bits to make the transition check possible: ------------  MOV N7:0 N7:2   and on a branch in parallel with this  MOV N7:1 N7:3
  7. Round Robin Code

    Make your lane ratios variable. On any lane whose 50% indication is true (remember to add a timer for each to ignore minor gaps between items) begin to increase its ratio. Once the 50%% indication is clear for an amount of time begin lowering the ratio back down toward 1. You'll have to experiment with times and amounts to avoid going way overboard by locking a lane out or giving one exclusive priority. An 'almost empty' indicator for each might help also.   On second reading I think you were describing a single feeder filling three lanes. I was thinking three lanes merging into a common conveyor. But the general idea applies with variable ratios except that you would increase the ratio slightly on the lanes whose 50% indicator is not true.
  8. V Memory

    The CTRIO module has its own manual. Download and read it. It has a lot of examples. When Directsoft is installed it has the option for loading example programs also. I believe there arre some CTRIO examples in there.
  9. Help: Basic Program Question

    Is a compare instruction considered a math instruction?
  10. V Memory

    I provide a bit of information for those working with Directsoft who have Allen Bradley experience. It starts here - http://theplcguy.com/ABtoAD/Introduction.htm As part of this I provide a table of AB to DL memory usage here - http://theplcguy.com/ABtoAD/DL06%20Memory%20Types.html Let me know if I can help in other ways.
  11. V Memory

    That's a very open question. Do you have experience with any other PLCs? The 'V' memory is generally not assigned by type except for counter and timer accumulators and various system locations. The manual for the specific CPU details these.  
  12. MR

    Highlighting a table I made for my site (thePLCguy)
  13. Does the unit documentation specifically mention that it supports Ethernet IP? I saw something about TCP/IP but that's not the same thing.
  14. Problem adding a box under a rung

    Which programming package are you using?
  15. TT pulse bit

    Search for the base timer name without the '.TT'